1. Field of the Invention
The present invention relates to a semiconductor device and a method of forming the same, in particular to a Metal-Insulator-Metal Capacitor.
2. Description of Related Art
Conventionally, capacitive elements constituted by a lower electrode, a capacitor film, and an upper electrode have the following types: MIS type (Metal-Insulator-Semiconductor) and SIS type (Silicon-Insulator-Silicon) that use semiconductor as a material of a lower electrode, and MIM type (Metal-Insulator-Metal) that use metal as a material of a lower electrode. Recently, the development of MIM type capacitive elements has been pushed forward to achieve low resistance and an increase in capacity density.
In Patent Document 1 (Japanese Patent Application Laid-Open No. 2005-150228 A), technology is described that when semiconductor is used as a material of a lower electrode, expands the surface area of the lower electrode by making the surface uneven or putting it into HSG (Hemispherical Grain).
In Patent Document 2 (Japanese Patent Application Laid-Open No. 2001-196562 A), technology is described that after forming an oxidization layer on a lower electrode constituted by an amorphous silicon film, forms HSG on the surface of the oxidization layer. The oxidation layer suppresses the growth of crystalline nuclei that exist in the lower electrode, and functions as a barrier film for not consuming the lower electrode during formation of HSG.
In Patent Document 3 (Japanese Patent Application Laid Open No. 2002-134719 A), the following technology is described. That is, an amorphous silicon film is formed on an insulating film, and then the amorphous silicon film is changed by HSG processing to increase grain size; thereby, semi-spherical silicon crystal grains separated in an island shape are formed. With the semi-spherical silicon crystal grains as a mask, the insulating film is etched to form grooves in it. By forming the lower electrode on such a face having projections and depressions, the surface area of the lower electrode is increased.
However, with the conventional HSG technology described in Patent Document 1, the lower electrode is formed with a silicon film, and semi-spherical silicon crystal grains are formed by changing the silicon film. Therefore, this technology cannot apply to MIM type capacitive elements that use metal as a material of the lower electrode. The Patent Documents 2 and 3 also disclose using a silicon film as the lower electrode. With the technology described in Patent Document 2, since an oxide film is formed over the lower electrode and HSG is formed further on top of it, resistance cannot be brought low and the merit of the MIM type capacitive elements is reduced. The method described in Patent Document 3 requires additional processes such as the growth of an amorphous silicon film, HSG processing, and etching, resulting in a cumbersome procedure.